I3C SLAVE - THE NEXT GENERATION IP CORE
I3C is a two-wire two-way serial bus that is optimized for several Slave Devices sensor systems and controlled at a time by only a single I3C Master Device. I3C is compatible backward with several Legacy I2C devices, but I3C devices also support significantly higher speeds, new communication modes, and new device roles, with the ability to over time change device roles.
Up to 11 I3 Slave Devices can be supported by an I3C Bus. The maximum number of devices depends on the trace length, the capacitive load per controller, and the device types (I 3C vs I3C), as those factors influence the clock frequency demands. This feature is supported with the MIPI I3C Slave Controller: Using Push-Pull Legacy, two-wire serial interface up to 12.5 MHz Coexistence of I 2C equipment on the same bus (with some limitations) I 2C — like messaging with a single data rate (SDR) Messages mode for HDR-DDR Support for in-band breakage Support Hot-Join Control of time Asynchronous fashion 0 timing 0. Support for synchronous time (not in this release)
SDR Mode is always initialized and mounted on the I3C bus. SDR and HDR-DDR modes are supported by the latest implementation. The LMMI interface issues command to the I3 Slave Controller. The I3C Slave Device Read/Write transactions are decoded from these commands. The I3C Slave Controller can also work in interrupt or polling mode. This means that the LMMI interface can choose whether to poll the I3C Slave for a change in status at regular intervals or wait for the I3C Slave Controller to interrupt it when data needs to be read or written.
An I3C Slave Controller listens for specific I3C Commands sent by the Current Master on the I3C Bus and responds appropriately. All Broadcast Commands, as well as any Directed Commands, addressed directly to the I3C Slave Controller and assisted by that I3 Slave Controller, fall under this category. For more information, click www.digitalblocks.com
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